The site isn’t tutorial in nature ... If you are adept at Verilog, you are able to jump to any of the exercises that interest you. Some of the later ones do sort of build on each other, but ...

We also like that the tutorial used some of the more interesting features of Vivado like automatic verification. Even if you are experienced with Verilog, there are some good tips here.

The BAY9 Virtual RF (VRF) is an IP core written in Verilog, that allows to emulate most system aspects of a typical RF transmission. When connected to a physical layer (PHY) core, the VRF IP ... The T ...

The FlexCAN controller is a highly configurable, synthesizable core implementing the CAN protocol (ISO 11898-1), CAN with Flexible Data rate (CAN FD), and CAN 2.0 B protocol specifications, ...