Going the schematic capture route eliminates the need to learn VHDL or Verilog. [Carl’s] tutorial starts with installing Altera’s Quartus II software. He then takes the student through the ...

We also like that the tutorial used some of the more interesting features of Vivado like automatic verification. Even if you are experienced with Verilog, there are some good tips here.

The FlexCAN controller is a highly configurable, synthesizable core implementing the CAN protocol (ISO 11898-1), CAN with Flexible Data rate (CAN FD), and CAN 2.0 B protocol specifications, ...

The T-COR-30 FPGA IP core implements the algorithm of automatic tracking of objects in video and calculation of their pa-rameters for solving guidance and target designation tasks. The IP core ... The ...